94 [
"fins", [3, 270, 3, 3/4]],
123 [
"pwsn", [5.75, 2.5]],
125 [
"mtab", [4, 25, 4]],
152 [
"mss",
length(3+9/32,
"in")],
153 [
"rmsd",
length( 1/8,
"in")],
154 [
"rmsh",
length( 3/32,
"in")],
155 [
"rshc",
length( 5/16,
"in")],
156 [
"rmth",
length( 1/16,
"in")]
177 [
"drpo",
length(1+1/2,
"in")],
178 [
"rpd",
length(1+3/8,
"in")],
179 [
"rpfl",
length(1+5/32,
"in")],
181 [3.51, 6.50, 1.5, 1/2]]
264 (s == 1) ? [wth*1/3, [wth*2/3, [1, 1-bs]]]
265 : (s == 2) ? [wth*1/3, [wth*2/3, [
for (s=[0:1/32:1/8]) 1-pow(s,2)]]]
266 : (s == 3) ? [[wth*4/5, [1, 1+bs]], [wth*1/5, 1+bs]]
267 : (s == 4) ? [[wth*4/5, [
for (s=[0:1/32:1/8]) 1+pow(s,2)]], [wth*1/5, 1+pow(1/8,2)]]
282 function pczo ( d = 0 )
287 wth + (is_list(d) ?
second(d) : d) * 5/4 + zo;
302 translate([0, 0, pwct -
eps*2])
303 clamp_cg(size=pwcd, clamp=[1, pwzo, [pwsd,undef,pwsh,pwsn], pwct, pwcp], wth=0, mode=2);
307 module enclosure_box()
315 function piac_to_piab(pia)
323 a = i[1], ax = a[0], ay = a[1],
324 m = i[2], mx = m[0], my = m[1],
333 [is_undef(ax) ? undef : -ax, ay],
334 [is_undef(m) ? undef : -mx, my],
335 is_undef(r) ? undef : -r,
336 [h0[0], h0[1], h0[2], mphda, h0[4], h0[5], h0[6]],
369 translate([
limit(z,-1,+1)*iw/2 + m, il/2 + wth -
eps*2, 0])
375 translate([iw/2 + wth -
eps*2,
limit(z,-1,+1)*il/2 + m, 0])
381 translate([
limit(z,-1,+1)*iw/2 + m, -(il/2 + wth -
eps*2), 0])
387 translate([-(iw/2 + wth -
eps*2),
limit(z,-1,+1)*il/2 + m, 0])
400 module internal_wire_passage()
414 z = iw/2 - iwpd/2 - wth,
415 s = (iwps>0) ? 1 : -1,
416 o = (iwps>0) ? rscl : -lscl
421 nc = (oscl>0) ? cols : cols-1;
422 zc = -il/2 - wth + iscl;
429 for (i=[0:rows-1], j=[0 : nc])
430 translate([zr - i*sr * iwps, zc + j*sc, zo])
432 cylinder(d=iwpd, h = wth+
eps*8, center=true);
468 nc = (oscl>0) ? cols : cols-1,
469 zc = -il/2 - wth + iscl,
478 for (j=[0 : nc]) [0, zc + j*sc],
505 zr = -iw/2 + roww/2 + lscl,
508 zc = iscl + (dlts - mss)/2,
513 p1 = [u, u, u, u, -rmth -(cdms?0:rmsh)],
521 for (i=[0:rows-1], j=[0:cols-1])
522 [2, [0, -1], [zr + i*sr, zc + j*sc, 0], 180, h0, u, p1, f ],
523 for (i=[0:rows-1], j=[0:cols-1])
524 [2, [0, -1], [zr + i*sr, zc + j*sc + dc, 0], 000, h0, u, p1, f ],
530 if (
is_defined(piac) && mpc2b ) for (i=piac_to_piab(piac)) i
548 h = ih, size = [iw, il],
549 vrm = evrm, vr = evr,
563 internal_wire_passage();
566 translate([pwxo, -il/2-wth/2, pwzo]) rotate([90, 0, 0])
567 clamp_cg(size=pwcd, wth=wth*4, mode=0);
577 translate([0, logod - il/2, 0])
578 mirror([0, 1, 0]) rotate([0, 0, 180])
579 omdl_logo(d=logod, b=
true, t=
true, a=1, $fn=36);
589 translate([pwxo, -il/2-wth/2, pwzo]) rotate([90, 0, 0])
590 clamp_cg(size=pwcd, clamp=[pwcs, pwzo, [pwsd,undef,pwsh,pwsn], pwct, pwcp],
cone=pwcs+1, wth=wth, mode=1);
601 echo(str( parent_module(0),
"(): power cord hole size = ", pwcd ));
606 module enclosure_cover()
612 module cover_round_cut_duplex()
615 for (i=[0:rows-1], j=[0 : cols-1])
616 translate([zr - i*sr, zc + j*sc, zo])
625 translate([0, i*mss/2, 0])
639 translate([0, 0, rmsh/2])
644 l = zh + rmsh +
eps*4,
658 translate([0, i * drpo/2])
664 translate([0, j * (rpd/2 + rpfl)/2])
665 square([rpd, rpd/2], center=true);
672 module cover_stabilizers()
677 for (i=[0:rows-1], j=[0 : cols-1])
678 translate([zr - i*sr, zc + j*sc, zo])
685 translate([0, 0, zo])
689 rectangle([4, 1]*rshc, vr=rshc/4, vrm=0, center=
true);
692 translate([0, i * (mss+rshc)/2])
697 co = [0,1/3]*rshc * -i,
712 ih = max([ wth,
second(l()) ]);
720 is_undef(piac) ? undef
721 : [pmode, [for (i=piac) i]];
732 zr = iw/2 - roww/2 - lscl;
735 zc = -il/2 - wth + iscl + dlts/2;
755 h = ih, size = [iw, il],
756 vrm = evrm, vr = evr,
772 cover_round_cut_duplex();
782 module check_cm(name, mc, md)
791 "bad entry in map [", name,
"] = [", k,
",",
map_get_value(mc, k),
"]"
809 lscl + roww * rows + rscl;
817 iscl - wth * 3/2 + cols * (dlts + wth) + oscl;
840 translate([-(iw/2 + ps), 0, 0])
844 translate([+(iw/2 + ps), -(il/2 + ps), 0])
848 translate([+(iw/2 + ps), 0, 0])
module log_warn(m)
Output warning message to console.
eps
<decimal> Epsilon, small distance to deal with overlapping shapes.
function binary_bit_is(v, b, t=1)
Test if a binary bit position of an integer value equals a test bit.
function defined_e_or(v, i, d)
Return an element of an iterable when it exists or a default value otherwise.
function third(v)
Return the third element of an iterable value.
function second(v)
Return the second element of an iterable value.
function first(v)
Return the first element of an iterable value.
function limit(v, l, u)
Limit a list of numbers between an upper and lower bounds.
function strl(v)
Convert a list of values to a concatenated string.
function map_get_value(m, k)
Get the map value associated with a key.
function map_get_keys(m)
Get a list of all map keys.
module map_check(m, verbose=false)
Perform basic format checks on a map and output errors to console.
function map_exists(m, k)
Test if a key exists.
function is_defined(v)
Test if a value is defined.
module screw_bore(d=1, l=1, h, n, t, s, f=1, a=0)
Flat and beveled-head screw bore with nut, nut slot, and bore tolerance.
module omdl_logo(r=5, c=false, b=false, t=false, td="ltr", a=0, d)
Standard omdl logo.
module clamp_cg(size, clamp, cone, grip, wth=0, gap=10, mode)
A clamp, bushing, and/or grip for wire/hose wall penetrations.
module screw_mount_tab(wth, screw, brace, size, vr, vrm)
A mount tab with screw hole and support brace.
power_strip_sg_default_box
<map> A single gang electrical device box configuration.
module power_strip_sg(cols=1, rows=1, mode=7, verb=1, cm_box=power_strip_sg_default_box, cm_mount=power_strip_sg_default_mount, cm_cover=power_strip_sg_default_cover)
A power strip generator for single gang electrical receptacles.
power_strip_sg_default_mount
<map> A single gang electrical device mount configuration.
power_strip_sg_default_cover
<map> A single gang duplex receptacle cover configuration.
module project_box_rectangle(wth, h, size, vr, vrm, inset, lid, lip, rib, wall, post, align, mode=0, verb=0)
A rectangular box maker for project boxes, enclosures and housings.
module rectangle_c(size, core, t, co, cr=0, vr, vr1, vr2, vrm=0, vrm1, vrm2, center=false)
A rectangle with a removed rectangular core.
module rectangle(size, vr, vrm=0, center=false)
A rectangle with corner rounds or chamfers.
module cone(r=1, h, d, vr)
A cone.
function length(v, from=length_unit_default, to=length_unit_base, d=1)
Convert a value from from one units to another with dimensions.